These are all great opinions that are countered soundly by the article I linked. Do you have articles you suggest I read?
> And RISC is the way to go, because we've known for some 40+ years that CISC is bad.
Quantify 'bad'. Again these are all opinions.
Nobody will argue with you x86 is terrible. What I'm saying, backed by the article I linked, is that the fact the x86 ISA is terrible really doesn't hold it back. And once you start optimizing a RISC architecture, over time, for performance, it quickly approaches the same thing.
> Not really. Fusion is mostly academic, rather than an industry standard. E.g. no RISC-V processor in the market does fusion[0].
It doesn't depend on fusion but since 2016 it's pretty clear it'll be an optimization. A big one! Which means that complexity is coming whether or not any market cores implement it today or not, which is part of the argument I'm making haha. Once you take the path of these optimizations, the cores start to look pretty familiar. Read the reply to the comment you linked.
Nobody is going to leave performance on the table to satisfy some niche opinions on complexity being bad.
> But, for anyone actually designing systems, it does matter.
What is "actually designing systems" today? There's complexity in everything (especially anything performant) and frankly, that complexity is abstracted effectively by compilers and operating systems.
> In the present hyper-networked world, this is unacceptable. In IoT, using x86 should be criminal negligence, and we will no doubt see it actually recognized as such in the courts at some point in the not-so-distant future.
Citation needed?
> x86 had a good run. It's already well past the time to move on, leave it in the past where it belongs.
> And RISC is the way to go, because we've known for some 40+ years that CISC is bad.
Quantify 'bad'. Again these are all opinions.
Nobody will argue with you x86 is terrible. What I'm saying, backed by the article I linked, is that the fact the x86 ISA is terrible really doesn't hold it back. And once you start optimizing a RISC architecture, over time, for performance, it quickly approaches the same thing.
> Not really. Fusion is mostly academic, rather than an industry standard. E.g. no RISC-V processor in the market does fusion[0].
It doesn't depend on fusion but since 2016 it's pretty clear it'll be an optimization. A big one! Which means that complexity is coming whether or not any market cores implement it today or not, which is part of the argument I'm making haha. Once you take the path of these optimizations, the cores start to look pretty familiar. Read the reply to the comment you linked.
Nobody is going to leave performance on the table to satisfy some niche opinions on complexity being bad.
> But, for anyone actually designing systems, it does matter.
What is "actually designing systems" today? There's complexity in everything (especially anything performant) and frankly, that complexity is abstracted effectively by compilers and operating systems.
> In the present hyper-networked world, this is unacceptable. In IoT, using x86 should be criminal negligence, and we will no doubt see it actually recognized as such in the courts at some point in the not-so-distant future.
Citation needed?
> x86 had a good run. It's already well past the time to move on, leave it in the past where it belongs.
Fine, but not relevant to CISC vs RISC.